Functional Verification
Functional Verification is often the most resource intensive and costly part of the SoC hardware design process. ASICraft's engineering team can starting verification early in the design cycle by streamlining testbench development, facilitating faster turnaround times and high quality, reliable designs.
ASICraft's expertise covers a comprehensive range of skills including test plan creation, testbench development and design debug at both IP block and SoC level. We are able to bring the latest testbench verification methodologies such as UVM VIP development, functional and metric driven verification.
- Feature Extraction From Specification.
- Develop Test Plan Which Includes Stimulus Generation Plan, Functionality Checking And Coverage Modeling.
- Review The Test Plan With Design Team.
- Develop Testbench Environment And Other Components For Verifying Each Block In Design
- Create Necessary Test Cases To Ensure Desired Functionality Of Each Block.
- Run Regression Tests At Block Level And Report Bugs In RTL and as well used VIPs component used in TB.Create Directed And Randomized Test Cases To Check Corner Cases In Design.
- Integrate All Blocks And Reuse Block Level Verification Components To Verify The Regression Testing To Verify System Functionality And Generate Coverage Reports
AMSVerification
Verification of Analog and Mixed-Signal(AMS) circuits and systems is increasingly challenging. This session explores novel AMS simulation and emulation techniques, and advanced reliability and performance issues with technology scaling.
Type of AMS Verification
- Analog Verification
- Mixed-Signal Verification
- Analog Verification Consulting
Other Services
- RTL to GDSII (P&R) Services
- RTL Synthesis & STA
- Design Sign-off Services
- Design for Test (DFT) Services
- Analog Design Services
